Significantly larger packing densities of semiconductor integrated circuits have been achieved through the years. To obtain integrated circuits with high characteristics, reliability, and yield, not only high mechanical precision but also high electrical properties have come to be demanded. With this tendency, more rigorous conditions are imposed to crystal quality of a silicon wafer used for semiconductor integrated circuits. And to produce a silicon wafer with high crystal quality is demanded. Consequently, it is necessary to evaluate crystal quality of a silicon wafer accurately.
There is a selective etching method which is a method for evaluating crystal quality of a silicon wafer, in particular, a method for evaluating crystal defects of the wafer. In the method, Secco solution containing potassium dichromate (for example, see Japanese publication of examined application No. H06-103714), Sirtl solution or Wright solution containing chromic acid is used to conduct selective etching which utilizes difference of etching rates for a silicon wafer surface originated from the presence or absence of crystal defects. Then, etch pits appearing on the etched wafer surface are observed with an optical microscope etc. Thus the etch pits are detected and evaluated as crystal defects.
However, above etching solutions contain chromium. Chromium is a toxic substance, and wastewater treatment turns into a problem. Then, the so-called chromium-free etching solution containing no chromium is developed (see Japanese Patent Laid-open (Kokai) No. H07-263429; and Japanese Patent Laid-open (Kokai) No. H11-238773).
Besides, when a surface of a silicon wafer is etched with the etching solution containing chromium or the chromium-free etching solution as above, an etching rate is relatively high of 1 μm/min or more. Then, a silicon wafer with high electrical resistivity of greater than 1 Ω·cm is etched with such etching solutions, and etch pits are formed on a surface of the wafer. Thus the etch pits can be observed easily with an optical microscope etc.
However, for example, when a silicon wafer with low electrical resistivity of 1 Ω·cm or less undergoes selective etching as above, the following problem occurs: An unsaturated oxide film or stains (a stain film) is formed on the etched wafer surface significantly. And etch pits which must have been formed by selective etching cannot be observed.
Then, to observe the etch pits formed on a silicon wafer with low electrical resistivity of 1 Ω·cm or less, dilution etching method can be used. Dilution etching method uses an etching solution in which Secco solution or Wright solution as above is diluted with pure water etc. However, the dilution etching method uses an etching solution, although being diluted, still containing chromium which is a toxic substance as mentioned above. Therefore, a good deal of thought should be given to the influence on the global environment or humans, and wastewater treatment.
Besides, the following method can be conceived: diluting the chromium-free etching solution disclosed in Japanese Patent Laid-open (Kokai) No. H07-263429 and Japanese Patent Laid-open (Kokai) No. H11-238773 with water as with above to reduce an etching rate and to etch a silicon wafer with low electrical resistivity with this etching solution. However, simply diluting the chromium-free etching solution with water deteriorates selectivity of etching. And the capability to detect etch pits originated from crystal defects is deteriorated. Therefore, a problem occurs that it becomes extremely difficult to evaluate accurately crystal defects of a silicon wafer with low electrical resistivity.
Then, to circumvent these problems, not using selective etching method, a method for measuring crystal defects with an optical technique using light scattering (LST: Light Scattering Tomography) is also developed. However, the measuring method with LST has problems that measuring devices cost much and handling of the devices is difficult.